Description:
Springer-Verlag Publishing, 2014. 1. Hardcover. Very Good. Very Good+; Hardcover; Covers are still glossy; Unblemished textblock edges; The endpapers and all text pages are bright and unmarked; The binding is tight with a straight spine; This book will be shipped in a sturdy cardboard box with foam padding; Medium Format (8.5" - 9.75" tall); 1.4 lbs; Red covers with title in white lettering; 2014, Springer-Verlag Publishing; 339 pages; "Wafer-Level Chip-Scale Packaging: Analog and Power Semiconductor Applications," by Shichun Qu & Yong Liu.
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Wafer-Level Chip-Scale Packaging: Analog and Power Semiconductor Applications Hardcover - 2014
by Shichun Qu; Yong Liu
From the rear cover
This book presents a state-of-art and in-depth overview in analog and power WLCSP design, material characterization, reliability, and modeling. Recent advances in analog and power electronic WLCSP packaging are presented based on the development of analog technology and power device integration. The book covers in detail how advances in semiconductor content, analog and power advanced WLCSP design, assembly, materials, and reliability have co-enabled significant advances in fan-in and fan-out with redistributed layer (RDL) of analog and power device capability during recent years. Along with new analog and power WLCSP development, the role of modeling is a key to assure successful package design. An overview of the analog and power WLCSP modeling and typical thermal, electrical, and stress modeling methodologies is also provided.
This book also:
- Covers the development of wafer-level power discrete packaging with regular wafer-level design concepts and directly bumping technology
- Introduces the development of the analog and power SIP/3D/TSV/stack die packaging technology
- Presents the wafer-level analog IC packaging design through fan-in and fan-out with RDLs
Details
- Title Wafer-Level Chip-Scale Packaging: Analog and Power Semiconductor Applications
- Author Shichun Qu; Yong Liu
- Binding Hardcover
- Pages 322
- Volumes 1
- Language ENG
- Publisher Springer
- Date 2014-09-11
- Illustrated Yes
- Features Bibliography, Illustrated, Index
- ISBN 9781493915552 / 149391555X
- Weight 1.44 lbs (0.65 kg)
- Dimensions 9.21 x 6.14 x 0.81 in (23.39 x 15.60 x 2.06 cm)
-
Themes
- Aspects (Academic): Science/Technology Aspects
- Library of Congress subjects Chip scale packaging
- Library of Congress Catalog Number 2014946821
- Dewey Decimal Code 621.381
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Wafer-Level Chip-Scale Packaging: Analog and Power Semiconductor Applications
by Qu, Shichun
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Stock Photo: Cover May Be Different
Wafer-Level Chip-Scale Packaging: Analog and Power Semiconductor Applications
by Qu, Shichun
- Used
- Hardcover
- first
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- Like New
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- 1
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- Hardcover
- ISBN 10 / ISBN 13
- 9781493915552 / 149391555X
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Description:
Springer-Verlag Publishing, 2014. 1. Hardcover. Like New. Fine/As New; Hardcover; Covers are still glossy with "sharp" edge-corners; Unblemished textblock edges; The endpapers and text pages are all bright and unmarked; The binding is tight with a straight spine; This book will be shipped in a sturdy cardboard box with foam padding; Medium Format (8.5" - 9.75" tall); 1.4 lbs; Dark red covers with title in white lettering; 2014, Springer-Verlag Publishing; 339 pages; "Wafer-Level Chip-Scale Packaging: Analog and Power Semiconductor Applications," by Shichun Qu & Yong Liu.
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Stock Photo: Cover May Be Different
Wafer-Level Chip-Scale Packaging: Analog and Power Semiconductor Applications
by Shichun Qu
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Hard Cover. New. New Book; Fast Shipping from UK; Not signed; Not First Edition; The Wafer-Level Chip-Scale Packaging: Analog and Power Semiconductor Applications.
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Wafer-Level Chip-Scale Packaging: Analog and Power Semiconductor Applications
by Qu, Shichun; Liu, Yong
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- 9781493915552 / 149391555X
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