INTRODUCTION TO ADVANCED SYSTEM-ON-CHIP TEST DESIGN AND OPTIMIZATION

Netherlands: Springer-Verlag, 2005. (NETH) Presumed 1st edition Ownership stamp to top edge of pages, small ownerhsip label to the back of the cover, no other markings, Near Fine; no dust jacket as published. Hardcover, 388pp, index, diagrams. This book gives an introduction to testing, describes the problems related to SOC testing, discusses the modeling granularity and the implementation into EDA (electronic design automation) tools. The book is divided into three sections: i) test concepts, ii) SOC design for test, and iii) SOC test applications. The first part covers an introduction into test problems including faults, fault types, design-flow, design-for-test techniques such as scan-testing and Boundary Scan. The second part of the book discusses SOC related problems such as system modeling, test conflicts, power consumption, test access mechanism design, test scheduling and defect-oriented scheduling. Finally, the third part focuses on SOC applications, such as integrated test scheduling and TAM design, defect-oriented scheduling, and integrating test design with the core selection process. (2.5 JM 0322. 1st. Hardcover. Near Fine/No Dust Jacket. 8vo - over 7¾" - 9¾".