CMOS Circuit Design, Layout, and Simulation by R. Jacob Baker - 1997-08-22

Wiley & Sons, Incorporated, John, 1997. Hardcover. Acceptable. Missing dust jacket; Readable copy. Pages may have considerable notes/highlighting. ~ ThriftBooks: Read More, Spend Less.Dust jacket quality is not guaranteed.

Wiley & Sons, Incorporated, John. Used - Good. Used book that is in clean, average condition without any missing pages.

Wiley-IEEE Press, 1997-08-21. Hardcover. Very Good. Hardcover. Very GoodFREE Media Mail Shipping on all U.S. orders over $ 25.00

Brand: Wiley-IEEE Press, 1997-08-22. 1. hardcover. Used: Good.

Wiley-IEEE Press. Good+ with No dust jacket as issued. 1997. Hardcover. 0780334167 . Foxing to page fore-edges. Great overall condition. Minor cosmetic wear. No noteworthy blemishes. No writing.; 163 X 53.2 X 238.5 millimeters; 902 pages .

IEEE Press, 1997. This is an ex-library book and may have the usual library/used-book markings inside.This book has hardback covers. In fair condition, suitable as a study copy. No dust jacket. Please note the Image in this listing is a stock photo and may not match the covers of the actual item,1550grams, ISBN:9780780334168

IEEE Press, 1998. This is an ex-library book and may have the usual library/used-book markings inside.This book has hardback covers. In fair condition, suitable as a study copy. No dust jacket. Please note the Image in this listing is a stock photo and may not match the covers of the actual item,1550grams, ISBN:9780780334168

Wiley-IEEE Press. Hardcover. New. New. In shrink wrap. Looks like an interesting title!