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Predictive Simulation of Semiconductor Processing: Status and Challenges
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Predictive Simulation of Semiconductor Processing: Status and Challenges Hardcover - 2004

by Jarek Dabrowski (Editor); Eicke R. Weber (Editor)


From the publisher

Predictive Simulation of Semiconductor Processing enables researchers and developers to extend the scaling range of semiconductor devices beyond the parameter range of empirical research. It requires a thorough understanding of the basic mechanisms employed in device fabrication, such as diffusion, ion implantation, epitaxy, defect formation and annealing, and contamination. This book presents an in-depth discussion of our current understanding of key processes and identifies areas that require further work in order to achieve the goal of a comprehensive, predictive process simulation tool.

First line

The unprecedented success of the "silicon revolution" has demonstrated that a new microelectronic technology can be developed and the existing one optimized in a straightforward way: by experimenting with processing parameters during production.

From the rear cover

Predictive simulation of semiconductor processing enables researchers and developers to extend the scaling range of semiconductor devices beyond the parameter range of empirical research. It requires a thorough understanding of the basic mechanisms employed in device fabrication, such as diffusion, ion implantation, epitaxy, defect formation and annealing, and contamination. This book presents an in-depth discussion of our current understanding of key processes and identifies areas that require further work in order to achieve the goal of a comprehensive, predictive process simulation tool.

Details

  • Title Predictive Simulation of Semiconductor Processing: Status and Challenges
  • Author Jarek Dabrowski (Editor); Eicke R. Weber (Editor)
  • Binding Hardcover
  • Edition 1st
  • Pages 490
  • Volumes 1
  • Language ENG
  • Publisher Springer
  • Date 2004-05-05
  • ISBN 9783540204817 / 3540204814
  • Weight 2.35 lbs (1.07 kg)
  • Dimensions 9.7 x 6.5 x 1.5 in (24.64 x 16.51 x 3.81 cm)
  • Library of Congress subjects Microelectronics - Technological innovations, Semiconductors - Simulation methods
  • Library of Congress Catalog Number 2004040690
  • Dewey Decimal Code 621.381

About the author

J. Dabrowski: Born in Warsaw, Poland, Sept. 29, 1958. PhD, Institute of Physics of the Polish Academy of Science (IF PAN), Warsaw, 1989. Scientific staff member IF PAN 1983-1992; postdoctoral fellow Fritz Haber Inbstitute of the Max Planck Society, Berlin, Germany, 1990-1991; postdoctoral fellow Xerox Palo Alto Research Center, California, 1992; since 1993 with IHP-microelectronics, Frankfurt (Oder), Germany. Conference series chairman, Challenges in Predictive Process Simulation (1997, 2000, 2002); international advisory commmittee member, International Training Institute for Materials Science, Hanoi, Vietnam. Project leader, German Research Society (1998-2000); von Neuman Institute for Computing (since 1993). Author (monograph), "Silicon surfaces and formation of interfaces; basic science in the industrial world" (World Scientific, 2000). Editor (book), ""Recent Developments in Vacuum Science and Technology" (Research Signpost, 2003). Research in atomic diffusion mechanism in solid state; atomic structure of surfaces and semiconductor/dielectric interfaces; atomic structure of defects in semiconductors and insulators; signal processing for telecommunication. Achievements include discovery of atomic structure of the clean Si(113) surface; atomic structure of the main electron trap in GaAs (EL2 defect); atomic structure of the interface between a high-K dielectric (Pr2O3) and Si(001). Patents for silicon microelectronic technology; patents pending for telecommunication.

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